Article ID: 000081297 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Can I use the PCI Master/Target core as Master-only PCI core without Target capability?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT

Critical Issue

Description

Yes, the PCI® Master/Target core can be used as Master-only without Target capability in SOPC as Host-Bridge mode.

The command register of I/O enable (io_ena) and Memory enable (men_en) bits will be set to zero by default after reset, so the default value of the command registers are to disable the Target capability and when generating the core in Host-Bridge mode it will hardwired the Master enable (mstr_ena) bit to 1. 

Related Products

This article applies to 1 products

Cyclone® V GX FPGA

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.