Article ID: 000081247 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Are there any known issues forcing the 8b10b disparity through channel interface?

Environment

  • Stratix® II GX FPGA
  • Arria® II FPGAs
  • Arria® II GX FPGA
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Description

Yes. When ‘Channel Interface’ option is enabled, forcing the 8b/10b disparity through the tx_datainfull[] port does not work. All transceiver designs using ‘Channel Interface’ option in Quartus® II 9.0 SP2 and prior versions will be affected.

The affected device families are Arria® II GX, Stratix® II GX and Stratix® IV GX/GT.

Workaround: 
Manually modify the following parameter in the alt2gxb/altgx Megawizard generated wrapper file
    For Stratix II GX
    alt2gxb_component.tx_force_disparity_mode = "false",
        Change “false” to "true“
    For Stratix IV/Arria II GX
    transmit_pcsx.disparity_mode = "none",  (0,1,….(num of channels -1))
        Search for the above parameter and change “none” to “new”

This issue will be fixed in future Quartus® II version. You should select the ‘create forcedisp…’ option in the 8b/10b screen Megawizard™ and recompile the design.

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