Article ID: 000081228 Content Type: Error Messages Last Reviewed: 09/12/2012

Error: alt_xcvr_reconfig_0: add_fileset_file: No such file */alt_xcvr_reconfig_cpu.v

Environment

  • Quartus® II Subscription Edition
  • PCI Express
  • Simulation
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Why do I see an error of the following format when compiling PCI® Express IP in Quartus® II Software Release version v12.0

    Error: alt_xcvr_reconfig_0: add_fileset_file: No such file */alt_xcvr_reconfig_cpu.v

    Resolution

    This error will be seen during Qsys generation if the transceiver reconfiguration controller is included in your Qsys project and you have enabled "Create simulation model : Verilog" on the Qsys generation page.

    To work around this issue, either:

    1. Disable simulation model generation or
    2. Set "Create simulation model : VHDL" on the Qsys generation page or
    3. Remove the transceiver reconfiguration module from your Qsys project, export the reconfiguration signals to the upper project, and add the reconfiguration controller at that level of your design.

    This issue will be fixed in a future release of the Quartus II software.

    Related Products

    This article applies to 1 products

    Stratix® V GX FPGA

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