Hard IP for PCI Express User Guides Shows Incorrect Value for Receiver Detect Capacitor

The Debugging chapter of the 12.01 versions of the Stratix V Hard IP for PCI Express User Guide, Arria V Hard IP for PCI Express User Guide , and Cyclone V Hard IP for PCI Express User Guide states that the receiver detect circuitry must have a 100 uF capacitor on the TX pins. The correct value for the TX capacitors is 0.1 uF.

This issue is fixed in the December, 2012 veresions of the Stratix V Hard IP for PCI Express User Guide, Arria V Hard IP for PCI Express User Guide , and Cyclone V Hard IP for PCI Express User Guide