Article ID: 000081176 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does my nativelink simulation fail in Quartus II software version 8.0 and earlier when I try to simulate Altera memory interface design with Stratix II GX device in Modelsim?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

When simulating the design that uses Altera® memory controller IPs through nativelink in Quartus® II software version 8.0 and earlier for Stratix® II GX devices, you will get following error in Modelsim

# ** Error: (vsim-3033) C:/path of the design/<instance_name>_phy_alt_mem_phy_sii.v: Instantiation of 'stratixii_io' failed. The design unit was not found.

The error is caused because the simulation netlist is generated using Stratix II device but family selected is Stratix II GX and the nativelink does not include Stratix II atom simulation library when family is selected as Stratix II GX.

To fix this issue:

1. Run the following TCL command in Quartus II TCL Console ( View -> Utility Window -> TCL Console) or include the command in the QSF file for your project:

For Verilog Design:

set_global_assignment -name EDA_DESIGN_EXTRA_ALTERA_SIM_LIB -section_id eda_simulation stratixii_ver

For VHDL Design:

set_global_assignment -name EDA_DESIGN_EXTRA_ALTERA_SIM_LIB -section_id eda_simulation stratixii

2. Run the nativelink simulation after executing the TCL commands. The simulation will run without an error.

This issue will be fixed in the future version of the Quartus II software.

 

Related Products

This article applies to 1 products

Stratix® II GX FPGA

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