Article ID: 000081009 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Compiling designs targeting Stratix IV GT devices in downbonded packages fails with the error "The transceiver block has no associated PCI Express hard IP block."

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    For designs that target Stratix® IV GT devices in downbonded packages, the Quartus® II software version 10.0 incorrectly places PCI Express hard IP block at the bottom transceiver block, which does not have a hard IP block attached to it. Compilation of the design fails with a message similar to the following:

    Error: Can’t assign I/O pad <“pad name”> to <pin name> because this causes failure in the placement of the other atoms in its associated channel.

    Error: The transceiver block has no associated PCI Express hard IP block.

    Resolution

    To work around this problem, upgrade to the Quartus II software version 10.0 SP1.

    This issue is fixed beginning with the Quartus II software version 10.0 SP1.

    Related Products

    This article applies to 2 products

    Stratix® IV FPGAs
    Stratix® IV GT FPGA

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