Article ID: 000080994 Content Type: Troubleshooting Last Reviewed: 08/20/2014

Error (114000): Time value MHz and time unit are illegal

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® II software version 14.0, you may see the Fitter error above when compiling the Seriallite III IP for Stratix® V devices.

    Resolution

    You can extract the following parameters from the earlier v13.1.4 Seriallite III IP top level RTL file and then transfer them to the 14.0 Seriallite III IP version.
                                                                           
    reference_clock_frequency => "xxx.x MHz",                                                
    pll_ref_freq       => "xxx.x MHz",                                             
    data_rate         => "xxxxx.x Mbps"   

    Alternatively, you can use the 13.1.4 Seriallite III IP version of the RTL and compile this in Quartus II software v14.0.               

                                                                           
                                                                           
    This problem is scheduled to be fixed in a future version of the Quartus II software.

    Related Products

    This article applies to 1 products

    Stratix® V GX FPGA

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