Article ID: 000080854 Content Type: Troubleshooting Last Reviewed: 11/06/2019

Why does the HDMI Intel® FPGA IP Windows* design example generation fail when the simulation check box is enabled ?

Environment

    Intel® Quartus® Prime Pro Edition
    HDMI Intel® FPGA IP
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Critical Issue

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition versions 19.1 and 19.2, the HDMI Intel® FPGA IP Windows* design example generation fails when the "simulation" check box is enabled.   

Resolution

This problem is fixed starting in the Intel® Quartus® Prime Pro Edition version 19.3 software.

Related Products

This article applies to 1 products

Intel® Arria® 10 FPGAs and SoC FPGAs

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