Critical Issue
The npor
input signal to the IP Compiler for
PCI Express must be gated by the gxb_powerdown
and pll_powerdown
signals,
to avoid bringing the hard IP out of reset while offset cancellation
is in progress. However, in the generated _plus.v file,
the npor
signal is not gated as required. As a result,
in the chaining DMA example, the npor signal can be asserted while
offset cancellation is still in progress.
To avoid bringing the hard IP out of reset while offset cancellation
is in progress, add user logic to gate the npor
signal
with the gxb_powerdown
and pll_powerdown
signals.
This issue will be fixed in a future version of the IP Compiler for PCI Express chaining DMA example.