Article ID: 000080705 Content Type: Product Information & Documentation Last Reviewed: 05/05/2015

How should the powerdown conduit on the IP Compiler for PCI Express be used?

Environment

  • Quartus® II Subscription Edition
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    Description

    A new conduit has been introduced in the 12.1 version of the IP compiler for PCI Express® in Qsys called powerdown.  This conduit contains the gxb_powerdown and pll_powerdown signals.

    These signals were previously contained in the pipe_ext conduit (see related solution).  You should export this interface and connect these signals as follows:

    1. Tie the gxb_powerdown signal to zero to enable the RX transceiver offset cancellation process.
    2. Drive the pll_powerdown signal with the inverse of the active-low signal pcie_rstn.

    Related Products

    This article applies to 5 products

    Cyclone® IV GX FPGA
    Stratix® IV GT FPGA
    Stratix® IV GX FPGA
    Arria® II GX FPGA
    Arria® II GZ FPGA

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