Due to a problem in the Quartus® Prime Standard Edition Software version 18.1 and earlier, you will see the following error message in the Cadence* gate level simulation when you use the Generic Serial Flash Interface FPGA IP.
ncelab: *E,CUVMUR: instance '{*Name Protected*}' of design unit '{*Name Protected*}' is unresolved in '{*Name Protected*}.{*Name Protected*}:{*Name Protected*}'.
ncelab: *N,CUVPRO: For the above CUVMUR error message, the problem occurred in module declared in file <quartus installation directory>/eda/sim_lib/cadence/cyclonev_atoms_ncrypt.v.
To work around this problem, you can manually disable the Enable Simulation setting of IP to perform the gate level simulation in Cadence.
After fixing the error above, you will see another error:
Error (suppressible): (vopt-2732) ../simulation/submodules/gcp_infra_intel_generic_serial_flash_interface_top_0_qspi_inf_inst.sv(860): Module parameter 'ENABLE_SIM_MODEL' not found for override
To fix the error, refer to this knowledge article (Article ID: 000076444).