Article ID: 000080584 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Is there any known issue when using altdq_dqs megafunction as RLDRAMII mode in Quartus II 11.1SP2?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Yes. When you use altdq_dqs megafunction and set “RLDRAMII mode” as “x18” or “x36” in Parameter Settings page, you may find the port width of dqs_bus_out in the IP top file is mismatched.

Declaration of dqs_bus_out in IP top file is

output   [0:0]  dqs_bus_out;

 

The expected declaration of dqs_bus_out should be:  

output   [1:0]  dqs_bus_out;

 

As a workaround, please change the port width of dqs_bus_out manually. This issue will be fixed in  Quartus® II software future version.
Resolution

Change

output   [0:0]  dqs_bus_out;

 

To

 

output   [1:0]  dqs_bus_out;

Related Products

This article applies to 1 products

Stratix® IV GX FPGA

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