Article ID: 000080565 Content Type: Troubleshooting Last Reviewed: 05/09/2016

Clock Signals with No Fanout Cause an Error in the Spectra-Q Engine's Fitter

Environment

    Intel® Quartus® Prime Pro Edition
    Clock
BUILT IN - ARTICLE INTRO SECOND COMPONENT

Critical Issue

Description

The Quartus® Prime Pro Edition software\'s Spectra-Q engine does not automatically create clock buffers for clock signals that have no fanout in the current compilation. For example, the Spectra-Q engine does not create a clock buffer for a PLL OUTCLK that acts only as a partition input but has no fanout in the partition. The lack of clock buffers for these clock signals might cause an error in the Fitter with the following error message:

Error (14971): Top level port of [...] does not reach core routing & was not previously routed by FPP.

Alternatively, if the Spectra-Q engine cannot insert a clock buffer for a clock signal (for example, if the clock signal\'s partition is read-only), an error might occur in a subsequent compilation when destinations are added for the signal.

Note: In the Partial Reconfiguration (PR) flow, each clock that drives a PR partition must have at least one fanout in that partition in the base compilation to ensure that clock resources are reserved.

Resolution

You have the following options:

  • Ensure that the clock source has a fanout in the initial compilation of the source partition.
  • Manually instantiate a clock buffer to drive the ports on the partition that have no fanout.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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