Article ID: 000080410 Content Type: Install & Setup Last Reviewed: 09/12/2017

Why do I get the wrong result for ALTERA_FP_FUNCTION IP in VCSMX Simulation?

Environment

    Intel® Quartus® Prime Pro Edition
    Intel® Quartus® Prime Standard Edition
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Description

You may see a wrong result 'xxxxxxxxx' for ALTERA_FP_FUNCTION IP in VCSMX Simulation in Quartus® Prime Software Pro/Standard Edition version 16.0/16.1.

This is due to verilog "ncrypt" files are filtered out when generating device compilation library. 

Other simulators except VCSMX do not affect to this issue. 

Resolution

To work around this problem, add all *ncrypt* files into the simulation script.

 

vlogan v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS   "$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/twentynm_atoms_ncrypt.v"      -work twentynm

vlogan v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS   "$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/twentynm_hssi_atoms_ncrypt.v" -work twentynm_hssi

vlogan v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS   "$QUARTUS_INSTALL_DIR/eda/sim_lib/synopsys/twentynm_hip_atoms_ncrypt.v"  -work twentynm_hip

 

This problem is scheduled to be fixed in a later release of the Quartus® Prime software.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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