Article ID: 000080405 Content Type: Troubleshooting Last Reviewed: 04/13/2017

Why is there no TX output when simulating the IrDA UART IP?

Environment

    Intel® Quartus® Prime Standard Edition
    IrDA UART Intel® FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in IrDA UART simulation model in the Quartus® Prime software version 15.1 and earlier, data is not loaded from the FIFO to the IrDA TX output.

Resolution

This problem has been fixed beginning with the Quartus Prime Standard edition software version 16.0 Update.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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