Due to incorrect rule check in the IP GUI, Intel® Stratix ® 10 Avalon®-ST Interface for PCI Express* IP for Intel® Quartus® Prime Pro 19.3 and
earlier allows minimum BAR size of 7 bits to be selected. However, this selection will still show FPGA advertising 8 bits of BAR size.
The minimum BAR size supported is 8 bits.
This problem is fixed in Intel® Quartus® Prime Pro software version 19.4.