Article ID: 000080276 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does Receiver Bitslip not work in Low Latency PHY IP for Stratix V GX devices?

Environment

  • Stratix® V GX FPGA
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Quartus® II 10.1 and 10.1 SP1 software incorrectly allows you to select the RX Bitslip option.  Receive Bitslip option is not supported in Low Latency PHY IP for Stratix® V GX devices. This option should not be selectable in IP Megawizard™ flow. 

This issue will be fixed in future Quartus II software versions.

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.