Article ID: 000080173 Content Type: Troubleshooting Last Reviewed: 10/15/2011

PCI Express User Guide Specifies Wrong Arria II GX Support for Avalon-MM 62.5 MHz Application Clock

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    IP Compiler for PCI Express Gen1:× soft IP variations that support an Avalon-MM interface and target an Arria II GX device can support a 62.5 MHz application clock, but hard IP variations that support an Avalon-MM interface and target an Arria II GX device do not support a 62.5 MHz application clock. This support status is not documented accurately in the user guide.

    This issue affects all SOPC Builder- and Qsys-generated IP Compiler for PCI Express variations that target an Arria II GX device.

    Resolution

    No workarounds are required. This is a documentation error only.

    This issue is fixed in version 11.0 of the IP Compiler for PCI Express User Guide.

    Related Products

    This article applies to 2 products

    Arria® II FPGAs
    Arria® II GX FPGA

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