Article ID: 000079984 Content Type: Troubleshooting Last Reviewed: 05/01/2013

Certain I/O Pins Should be Grounded for Cyclone V Hard Memory Controller Operation

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    This problem affects DDR2, DDR3, and LPDDR2 products.

    The Cyclone V pin-out file identifies some general I/O pins that you should connect to ground when using the hard memory interface on Cyclone V devices. If you do not ground these pins, your design might experience increased crosstalk from neighboring I/Os, or reduced maximum frequency capability.

    Resolution

    There is no workaround for this issue.

    This issue will not be fixed.

    Related Products

    This article applies to 1 products

    Cyclone® V FPGAs and SoC FPGAs

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