Article ID: 000079837 Content Type: Troubleshooting Last Reviewed: 08/09/2023

Why do the Arria® V GZ and Stratix® V Hard IP for PCI Express exit hot reset early?

Environment

    Quartus® II Subscription Edition
    Arria® V GZ Hard IP for PCI Express Intel® FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The Arria® V GZ and Stratix® V Hard IP for PCI Express® exit the LTSSM state Hot Reset immediately when the soft reset controller is being used. This causes the Hard IP to exit the hot reset state before the connected Root Port.

No impact has been observed in real hardware.

 

 

Resolution

This problem is fixed starting with the Intel® Quartus® Prime Standard Edition Software version 14.0.

Related Products

This article applies to 5 products

Arria® V GZ FPGA
Stratix® V E FPGA
Stratix® V GS FPGA
Stratix® V GT FPGA
Stratix® V GX FPGA

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