Article ID: 000079773 Content Type: Troubleshooting Last Reviewed: 11/24/2016

Recalibration Requests Can Cause Controller Errors Under Certain Circumstances

Environment

    Intel® Quartus® Prime Pro Edition
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Critical Issue

Description

On Arria 10 devices, regardless of memory protocol, recalibration requests issued to the PHY from the EMIF debug toolkit while the traffic generator is active can cause unrecoverable errors in the hard memory controller.

Resolution

The workaround for this problem is to ensure that any traffic to the EMIF interface is completely idle and dormant for at least 100 cycles prior to issuing a recalibration request; otherwise, the hard memory controller may lock up and require a hard reset to recover. This problem will be fixed in a future version.

Related Products

This article applies to 1 products

Intel® Arria® 10 FPGAs and SoC FPGAs

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