Critical Issue
Although all pins within a group of I/O banks must share a single VCCPD pin, the Fitter does not enforce this restriction.In Stratix V devices, a single VCCPD pin is shared with a group of I/O banks. I/O bank labels with the same number (such as 7A, 7B, 7C, and 7D) form a group that share the same VCCPD pin, with the exception of Banks 3A, 3B, 3C, and 3D—Banks 3A and 3B form a group with one VCCPD pin; Banks 3C and 3D form a different group with its own VCCPD pin.For example, an I/O bank that uses a 3.0-V VCCPD pin forces all other I/O banks in the same group to use 3.0-V VCCPD; an I/O bank that uses a 2.5-V VCCPD pin forces all other I/O banks in the same group to use 2.5-V VCCPD.For details of supported VCCIO voltage levels available for VCCPD pins, refer to the I/O Standards and Voltage Levels section in the I/O Features in Stratix V Devices chapter of the Stratix V Device Handbook.
If you use output or bidirectional pins with the 3.3 V-LVTTL/LVCMOS I/O standard, you must enforce the VCCPD restriction manually with location assignments.