Critical Issue
Description
This problem affects interfaces using DQS Tracking on some Arria 10 devices.
On ES-class Arria 10 devices, DQS tracking is disabled at speeds below 667 MHz.
For RLDRAM 3 interface, DQS tracking is necessary to calibrate the DQS capture signal to the correct phase of the QK clock. At speeds below 667 MHz, it is currently possible to calibrate only to the correct clock cycle.
Resolution
The workaround for this issue is to operate at a frequency higher than 667 MHz.
This issue will be fixed in a future version.