Quartus® II 9.1 should be able to fit four separate instantiations of a single ALTGX™ Megawizard™ file with proper “GXB TX PLL Reconfiguration Group Setting” assignment in Assignment Editor. Stratix® IV GX handbook (v. SIV52005-3.0) does not clearly state this requirement. This information will be updated in the future handbook version. Following is an example.
A single transceiver module was created using ALTGX Megawizard. Four instances of the same ALTGX Megawizard were added to the top level file. Pin assignments were made to fit them in the same transceiver block. Quartus II compilation returned following Fitter errors:
Error: Can't assign I/O pad "tx_dataout0" to PIN_AP4 because this causes failure in the placement of the other atoms in its associated channel
Error: Quartus II software cannot combine the following GXB PLL(s) due to inconsistent parameters and/or input connections
Error: Assignment "GXB_TX_PLL_RECONFIG_GROUP" must have an assigned Value
Info: Atom "sas6G:HSSA|sas6G_alt4gxb_9dbb:sas6G_alt4gxb_9dbb_component|tx_pll0" has a value of "unassigned"
Info: Atom "sas6G:HSSB|sas6G_alt4gxb_9dbb:sas6G_alt4gxb_9dbb_component|tx_pll0" has a value of "unassigned"
Info: Atom "sas6G:HSSC|sas6G_alt4gxb_9dbb:sas6G_alt4gxb_9dbb_component|tx_pll0" has a value of "unassigned"
“tx_dataout0” is the tx_dataout pin name in this design. Error message indicates using GXB_TX_PLL_RECONFIG_GROUP assignment.
Following assignments on tx_dataout pins of all four instances were made in Assignment Editor to pass the Fitter.
To Assignment Name Value Enabled
tx_dataout0 GXB TX PLL Reconfiguration Group Setting 1 Yes
tx_dataout1 GXB TX PLL Reconfiguration Group Setting 1 Yes
tx_dataout2 GXB TX PLL Reconfiguration Group Setting 1 Yes
tx_dataout3 GXB TX PLL Reconfiguration Group Setting 1 Yes