Description
The instruction cache size of the Arm DMA-330 IP on Cyclone® and Arria® V SoC series is 512 bytes.
The cache line size is 8 words (4 bytes each), resulting in a line size of 32 bytes.
There are a total of 16 cache lines, giving a total of 512 bytes.
Resolution
This information has been added in Cyclone V and Arria V HPS Technical Reference Manuals.