Warning (12030): Port "rx_cda_max" on the entity instantiation of "ALTLVDS_RX_component" is connected to a signal of width 1. The formal width of the signal in the module is <number_of_channels&gt

Warning (12030): Port "rx_cda_max" on the entity instantiation of "ALTLVDS_RX_component" is connected to a signal of width 1. The formal width of the signal in the module is &lt;number_of_channels&gt;.  The extra bits will be left dangling without any fan-out logic.

The ALTLVDS_RX megafunction in the Quartus® II software version 10.0 does not correctly create the required number of output ports for rx_cda_max.  This port should have a width equal to the number of channels.

To work around this problem open the HDL variation file of the ALTLVDS_RX megafunction in your design and manually edit the port width of rx_cda_max and any sub_wire buses connected to rx_cda_max.

The port width should follow the format of [number_of_channels-1:0].