Article ID: 000079209 Content Type: Troubleshooting Last Reviewed: 06/29/2014

Can I use the transceiver Reconfiguration Controller's Avalon PLL Reconfiguration registers to switch between ATX PLL reference clocks on Stratix V GX/GT and Arria V GZ devices?

Environment

  • Stratix® V GS FPGA
  • Stratix® V GT FPGA
  • Stratix® V GX FPGA
  • Arria® V GZ FPGA
  • PLL
  • Streaming
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    No, you cannot use the transceiver Reconfiguration Controller Avalon® PLL Reconfiguration registers to switch between mutliple reference clocks when using ATX PLLs on Stratix® V GX/GT and Arria® V GZ devices.

    This method is only valid for CMU PLLs.

    Resolution

    To select between multiple reference clocks when using ATX PLLs you must use the .mif streaming method as detailed in the Transceiver Reconfiguration Controller Streamer Module Registers section of the Transceiver PHY IP Core User Guide.

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