Article ID: 000079206 Content Type: Troubleshooting Last Reviewed: 10/08/2015

Why can't I map USB0 to HPS IO in my Cyclone V SoC U19 package (484 pin count)?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to limitation of available HPS IO pins in U19 package (484 pin count), HPS USB0 cannot be routed to HPS IO Pin Mux. If a user tries to select USB0 to be routed to HPS IO Mux, Qsys will prompt an error of "Peripheral USB0 has an illegal mode set". USB1 is not affected by this limitation.

    Resolution In the Quartus II software version® 14.0 and later, if the device assignment contains a Cyclone V SoC device with U19 package, Qsys will show USB0 as "Unused" in the drop down option. USB1 is not affected and can be routed to HPS Pin Mux. If users require two USB controllers, they will need to use a larger package in their device assignment.

    Related Products

    This article applies to 2 products

    Cyclone® V FPGAs and SoC FPGAs
    Cyclone® V SE SoC FPGA