Low Probability of Calibration Failure Following Repeated Resets

This problem affects DDR2, DDR3, LPDDR2, RLDRAM II, RLDRAM 3, and QDR II products.

In version 13.0 and earlier, there exists a small possibility that calibration may enter an endless loop and fail to complete, following repeated assertions of global_reset_n or soft_reset_n.

This is a very unlikely failure. A typical instance of this failure is marked by a design which behaves normally until repeated assertions of global_reset_n or soft_reset_n, and becomes unresponsive thereafter. The EMIF Debug Toolkit cannot connect to the unresponsive design. Reprogramming the SRAM Object File (.sof) restores responsiveness to the design.

If you experience any of the following more common calibration failures, they are most likely not attributable to this issue:

• calibration never completes successfully
• calibration margins are small and calibration occasionally fails
• the design passes calibration but occasional data errors occur while running the design
• calibration is reported to have completed successfully, but the design doesn’t work

If you believe you have encountered this failure, or for more information, refer to the following Knowledge Base solution: rd05212013_358

This issue is fixed in versions 12.1sp1dp6 and 13.0dp1 and in all later versions.