Description
No, the CLK and CLKLK_FBIN pins must have the same I/O standard in APEX™ 20KE devices. The phase-locked loop (PLL) cannot accurately phase-match these pins in external feedback mode if they have different standards. The Quartus® II software will give an error if these pins are assigned different I/O standards.
Environment
BUILT IN - ARTICLE INTRO SECOND COMPONENT
