Article ID: 000078813 Content Type: Troubleshooting Last Reviewed: 07/19/2012

CPRI IP Core v12.0 Autorate Negotiation VHDL Testbench File Requires Modification

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The compile_autorate_phy_vhdl.do file that runs the autorate negotiation VHDL testbench for a Stratix V device includes extra lines that prevent the testbench from compiling.

    Resolution

    To avoid this issue, in the compile_autorate_phy_vhdl.do file in your CPRI IP core installation, comment out or remove the following lines:

    vcom -work xcvr_reconfig_cpri ./xcvr_reconfig_cpri_sim/alt_xcvr_reconfig/alt_xcvr_reconfig_cpu.vhd

    vcom -work xcvr_reconfig_cpri ./xcvr_reconfig_cpri_sim/alt_xcvr_reconfig/alt_xcvr_reconfig_cpu_reconfig_cpu_test_bench.vhd

    vcom -work xcvr_reconfig_cpri ./xcvr_reconfig_cpri_sim/alt_xcvr_reconfig/alt_xcvr_reconfig_cpu_reconfig_cpu.vhd

    This issue is fixed in version 12.0 SP1 of the CPRI MegaCore function.

    Related Products

    This article applies to 1 products

    Stratix® V FPGAs