Article ID: 000078797 Content Type: Troubleshooting Last Reviewed: 08/20/2013

What is the active bit mapping of the Arria V GX Custom PHY configured to use the 8B10B block when channel reconfiguration is selected?

Environment

  • Arria® V GT FPGA
  • Arria® V GX FPGA
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The active bit mapping of the Arria® V GX Custom PHY configured to use the 8B10B block when channel reconfiguration is selected is detailed below.

Transmitter Parallel Interface

tx_parallel_data[43:0] Active Bits
tx_parallel_dataFor each 44 bit word the 32 active data bits are tx_parallel_data[40:33,29:22,18:11,7:0]
tx_datakFor each 44 bit word the 4 active data bits are tx_parallel_data[41,30,19,8]

Receiver Parallel Interface

rx_parallel_data[63:0] Active Bits
rx_parallel_dataFor each 64 bit word the 32 active data bits are rx_parallel_data[55:48,39:32,23:16,7:0]
rx_datakFor each 64 bit word the 4 active data bits are rx_parallel_data[56,40,24,8]
rx_errdetectFor each 64 bit word the 4 active data bits are rx_parallel_data[57,41,25,9]
rx_disperrFor each 64 bit word the 4 active data bits are rx_parallel_data[59,43,27,11]
rx_runningdispFor each 64 bit word the 4 active data bits are rx_parallel_data[63,47,31,15]
rx_patterndetectFor each 64 bit word the 4 active data bits are rx_parallel_data[60,44,28,12]
rx_syncstatusFor each 64 bit word the 4 active data bits are rx_parallel_data[58,42,26,10]
Resolution This information will be added to a future version of the PHY IP Userguide.

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