Article ID: 000078756 Content Type: Troubleshooting Last Reviewed: 12/26/2014

LINK_QUAL_PATTERN_SET in DisplayPort Receiver Supported at DPCD 1.1 Address

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

When the GPU is not used, the DisplayPort IP core receiver supports LINK_QUAL_PATTERN_SET at DPCD 1.1 address (00102h) instead of DPCD 1.2 addresses (0010Bh - 0010Eh).

This issue may cause the physical layer (PHY) CTS testing to fail.

Resolution

To avoid this issue, set the LINK_QUAL_PATTERN_SET value using DPCD 00102h address or turn on Enable GPU control.

This issue is fixed in version 14.1 of the DisplayPort IP core.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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