Article ID: 000078664 Content Type: Troubleshooting Last Reviewed: 08/13/2012

Can I start a new read or write process on the ALTGX_RECONFIG IP when the busy signal is high on Stratix IV GX/T, Arria II GX/Z, and Cyclone IV GX devices?

Environment

  • Cyclone® IV GX FPGA
  • Arria® II GZ FPGA
  • Stratix® IV GX FPGA
  • Stratix® IV GT FPGA
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Description

No, you can not start a new read or write process on the ALTGX_RECONFIG IP when the busy signal is high on Stratix® IV GX/T, Arria® II GX/Z, and Cyclone® IV GX devices.

Writing to, or reading from the ALTGX_RECONFIG IP when the busy signal is already high may result in corruption and failure of the current process. You should wait until the current process is finished and the busy signal is low before starting a new process.

This applies to all processes controlled by the ALTGX_RECONFIG IP, including offset cancellation.

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