Article ID: 000078647 Content Type: Troubleshooting Last Reviewed: 07/27/2012

Altera PLL v12.0: Entering output phase shift in degree units causes incorrect simulation

Environment

    Quartus® II Subscription Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT

Critical Issue

Description

By default, phase shifts in the Altera PLL v12.0 MegaWizard Plug-In Manager are specified in degree units. However, if you specify an output phase shift in degree units, the phase shift is not simulated correctly.

Resolution

To simulate the phase shift correctly, either specify the output phase shift in picoseconds or, in your .vo or .vho file include ps in your instantiation. For example, in the .vo or .vho file change

xxxxx.phase_shift0 = 5000

to

xxxxx.phase_shift0 = “5000 ps”

Related Products

This article applies to 3 products

Stratix® V FPGAs
Arria® V FPGAs and SoC FPGAs
Cyclone® V FPGAs and SoC FPGAs

1