Yes, due to an issue with the Quartus Prime software, the clock switchover feature in fractional PLLs in Arria® V and Stratix® V devices may not work correctly. This includes:
Automatic Switchover
Manual Switchover
Automatic Switchover with Manual Override
In Arria V and Stratix V devices, there are 2 fractional PLLs (PLL0 and PLL1) in each group. The issue may happen if the clock switchover feature is enabled on one fractional PLL while the other fractional PLL within the same group is not utilized.
If the clock switchover feature is working as expected with the existing programming file, no action is required.
If you are experiencing this issue, the workaround is to constrain the fractional PLL location so that both the PLL0 and PLL1 within the same group are utilized when you enable the clock switchover feature. For example, add a dummy PLL and constrain its location next to the PLL with clock switchover enabled. It is not required to enable the clock switchover feature on the dummy PLL.