Article ID: 000078482 Content Type: Troubleshooting Last Reviewed: 08/22/2023

RX buffer credit allocation - performance for received requests" (rxbuffer_rxreq_hwtcl) <selection>" is out of range: "Minimum", "Low", "Balanced"

Environment

    Quartus® II Subscription Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

This error message is displayed when opening a Quartus® II v13.1.4 Qsys system in Quartus® II v14.0 or later if the system has an Altera® Avalon®-MM Hard IP for PCI Express® with High or Maximum RX Buffer Credit Allocation chosen.

In addition, when parameterizing the Avalon-MM Hard IP for PCI Express in Quartus® II v14.0 or later, the High and Maximum settings for the Rx Buffer Credit Allocation are not available.

Resolution

Altera® found performance issues with the High and Maximum settings in the Avalon-MM variants. Consequently, these settings have been removed for Arria® V GZ, Arria® 10, and Stratix® V devices from Quartus® II software version 14.0.

These same parameters are scheduled to be removed for Avalon-MM variants in Arria® V and Cyclone® V devices in a future software release.

This change will be reflected in a future version of the user guides.

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This article applies to 16 products

Intel® Arria® 10 GX FPGA
Intel® Arria® 10 SX SoC FPGA
Cyclone® V SE SoC FPGA
Arria® V GT FPGA
Arria® V GX FPGA
Intel® Arria® 10 GT FPGA
Cyclone® V SX SoC FPGA
Cyclone® V GT FPGA
Stratix® V GX FPGA
Stratix® V GT FPGA
Cyclone® V GX FPGA
Stratix® V GS FPGA
Arria® V GZ FPGA
Arria® V SX SoC FPGA
Cyclone® V ST SoC FPGA
Arria® V ST SoC FPGA

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