Due to a problem in the Quartus® II Software version 12.1, errors may be seen when simulating the PCI Express® Qsys RootPort example design using the autogenerated simulation scripts for the Synopsys VCS tool and the Cadence Ncsim tool.
One of the following errors may be seen:
VCS
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Error-[XMRE] Cross-module reference resolution error
../../<variant>_tb/simulation/submodule/altpcietb_bfm_ep_example_chaining_pipe1b.v, 912
Error found while trying to resolve cross-module reference.
token 'bfm_log_common'. Originating module 'altpcietb_bfm_log_common'.
Source info: bfm_log_common.suppressed_msg_mask = msg_mask;
Ncsim
======
bfm_log_common.suppressed_msg_mask = msg_mask;
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ncelab: E*,CUVHNF (../<variant>_tb/simulation/submodules/altpcietb_bfm_ep_example_chaining_pipen1b.v,910|42): Hierarchical name component lookup failed at 'bfm_log_common'.
To workaround this problem in the Quartus® II Software version 12.1, apply below:
(1) Add the following lines to the top module
wire a,b,c,d;
altpcietb_bfm_log_common bfm_log_common ( .dummy_out (a));
altpcietb_bfm_req_intf_common bfm_req_intf_common ( .dummy_out (b));
altpcietb_bfm_shmem_common bfm_shmem_common ( .dummy_out (c));
This problem is scheduled to be fixed in a future version of the Quartus® II software.