Critical Issue
Description
For some instances of the FIR Compiler MegaCore function, if you select logic-based storage for data and coefficients, it is possible that the results of synthesis may include some block memory.
Configurations with FIR storage set to logic elements.
An unwanted block memory is used.
Resolution
Turn off Auto Shift Register Replacement in the Quartus II More Analysis and Synthesis Settings dialog box. This dialog box can be accessed by clicking More Settings in the Analysis & Synthesis Settings page of the Settings dialog box accessed from the Assignments menu in the Quartus II software.