Article ID: 000078131 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Are the Stratix V device IOE delay elements (D1-D6) compensated across PVT?

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Description

No, the Stratix® V device IOE delay elements (D1-D6) are not compensated across PVT.

The delay element value is fixed and does not adjust for PVT changes. However during compilation, the Quartus® II software chooses the best delay value within its respective available settings to meet timing across all PVT corners.

Refer to the IOE Programmable Delay for Stratix V devices in the DC and Switching Characteristics for Stratix V Devices (PDF) for details on the delay element settings.

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This article applies to 1 products

Stratix® V GX FPGA