Article ID: 000077930 Content Type: Troubleshooting Last Reviewed: 08/13/2012

Why do I get the following error message when using the Triple Speed Ethernet IP : "Error: Family name "Stratix II" is illegal Error: eth_tri_1port: HDL generation failed"

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

This error occurs when you generate the Triple Speed Ethernet® IP with simulation enabled and you have installed Quartus® II with only a limited set of devices. For example, only Arria® II GX device support has been installed.

To workaround this error, you can simply re-install Quartus II ensuring that all device famlies are installed. Then regenerate the Triple Speed Ethernet IP.

This problem will be fixed in a future version of the Quartus II software.

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This article applies to 21 products

Stratix® IV E FPGA
Cyclone® II FPGA
Stratix® V GT FPGA
Stratix® V GS FPGA
Stratix® II GX FPGA
Stratix® II FPGAs
Arria® II GZ FPGA
Stratix® III FPGAs
Stratix® IV GX FPGA
Arria® II GX FPGA
Stratix® IV GT FPGA
Stratix® V E FPGA
HardCopy™ IV E ASIC Devices
Arria® GX FPGA
HardCopy™ III ASIC Devices
Cyclone® III LS FPGA
HardCopy™ IV GX ASIC Devices
Cyclone® III FPGAs
Cyclone® IV E FPGA
Stratix® V GX FPGA
Cyclone® IV GX FPGA

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