Article ID: 000077895 Content Type: Troubleshooting Last Reviewed: 03/22/2022

Why does my F-Tile Ethernet Intel® FPGA Hard IP Design Example fail to acquire corrected received data in 50GE-2 OTN Variant ?

Environment

    Intel® Quartus® Prime Pro Edition
    Ethernet
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Critical Issue

Description

Due to a problem in the F-Tile Ethernet Intel® FPGA Hard IP in the Intel® Quartus® Prime Software v21.2, RX PCS66 output data is corrupted in 50GE-2 OTN variant (both FGT and FHT transceivers)

Resolution

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.3.

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs I-Series

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