Article ID: 000077885 Content Type: Troubleshooting Last Reviewed: 01/16/2013

Why do I get the following error message when compiling a PCI Express design in Quartus II software for Stratix V, Arria V or Cyclone V devices?


  • Quartus® II Subscription Edition
    Description Error (11128): The following signal cannot be routed: <project>:top|<variant>_plus:ep_plus|<variant>:epmap|altpcie_cv_hip_ast_hwtcl:pcie_core_hardip_epx4_inst|altpcie_av_hip_ast_hwtcl:altpcie_av_hip_ast_hwtcl|altpcie_av_hip_128bit_atom:altpcie_av_hip_128bit_atom|av_xcvr_pipe_native_hip:g_pcie_xcvr.av_xcvr_pipe_native_hip|av_xcvr_native:inst_av_xcvr_native|av_pcs:inst_av_pcs|av_pcs_ch:ch[3].inst_av_pcs_ch|av_hssi_rx_pld_pcs_interface_rbc:inst_av_hssi_rx_pld_pcs_interface|blockselect. The device does not contain the routing resources required to make this connection.
    Resolution This error is due to the dedicated pin_perstn on the PCI Express Hard IP does not being connected correctly.
    In PCI Express Hard IP, input pin "pin_perstn" must be directly driven by an I/O pin, it cannot be driven by user logic.
    To fix the error, connect the pin_perstn to FPGA pin nPERST.

    Related Products

    This article applies to 3 products

    Stratix® V GX FPGA
    Cyclone® V GX FPGA
    Arria® V GX FPGA