Article ID: 000077825 Content Type: Troubleshooting Last Reviewed: 08/11/2014

Why does my Arria V, Cyclone V, or Stratix V device Transceiver Toolkit design fail to lock when using Quartus II software version 14.0?

Environment

  • Cyclone® V GT FPGA
  • Arria® V ST SoC FPGA
  • Arria® V SX SoC FPGA
  • Cyclone® V SX SoC FPGA
  • Stratix® V GX FPGA
  • Stratix® V GS FPGA
  • Stratix® V GT FPGA
  • Cyclone® V ST SoC FPGA
  • Arria® V GT FPGA
  • Cyclone® V GX FPGA
  • Arria® V GX FPGA
  • Arria® V GZ FPGA
  • Quartus® II Subscription Edition
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    Description

    Due to a bug in the Quartus® II software version 14.0 Transceiver Toolkit System Console, your Arria® V, Cyclone® V, or Stratix® V device Transceiver Toolkit design may fail to lock on some channels because of an incorrect receiver address.

    Resolution

    To workaround this problem you can manually map your transmitter and receiver channels in the transceiver toolkit system console so that the addresses match.

    This problem will be fixed in a future version of the Quartus II software.

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