Article ID: 000077794 Content Type: Troubleshooting Last Reviewed: 12/26/2014

DisplayPort Receiver Performs Link Training Optimization During PHY CTS

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

When the GPU is not used, the DisplayPort IP core receiver performs link training optimization during physical layer (PHY) CTS.

This issue may cause the PHY CTS testing to fail.

Resolution

To avoid this issue, turn on Enable GPU control.

This issue is fixed in version 14.1 of the DisplayPort IP core.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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