Article ID: 000077782 Content Type: Error Messages Last Reviewed: 08/15/2014

Error (169175): Pin &ltname&gt with LVDS I/O standard needs a differential output buffer which is not available on location &ltname&gt.

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description You may get this error message during compilation in the Quartus® II software if you have assigned the IO standard LVDS to an IO pin which does not support true LVDS outputs.
Resolution

To avoid this error use the Emulated LVDS standard assignment LVDS_E_3R or LVDS_E_1R.

Note: To use emulated LVDS standards you need additional resistors on your board. Refer to the handbook of the respective target device for more information.

Related Products

This article applies to 18 products

Cyclone® V GT FPGA
Stratix® V GX FPGA
Cyclone® V GX FPGA
Stratix® V GT FPGA
Stratix® V GS FPGA
Arria® V GZ FPGA
Arria® V SX SoC FPGA
Cyclone® V ST SoC FPGA
Arria® V ST SoC FPGA
Arria® V GX FPGA
Arria® V FPGAs and SoC FPGAs
Arria® V GT FPGA
Cyclone® V E FPGA
Stratix® V E FPGA
Cyclone® V FPGAs and SoC FPGAs
Cyclone® V SE SoC FPGA
Cyclone® V SX SoC FPGA
Stratix® V FPGAs

1

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.