Critical Issue
The .do files provided with the CPRI IP core v11.1 testbenches for CPRI IP core v11.1 SP2 variations that target an Arria V device do not support simulation correctly.
To work around this issue, in your CPRI IP core Arria V testbench .do file, perform the following steps:
1. Replace the following lines:
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/sv_reconfig_bundle_merger.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_tx_pma_ch.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_tx_pma.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_rx_pma.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pma.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pcs_ch.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pcs.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_native.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_plls.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_data_adapter.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_8g_pcs_aggregate_rbc.sv
with the following replacement lines:
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/sv_reconfig_bundle_merger.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_avmm_dcd.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_h.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_avmm_csr.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_tx_pma_ch.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_tx_pma.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_rx_pma.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pma.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pcs_ch.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_pcs.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_avmm.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_native.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_plls.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_xcvr_data_adapter.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_reconfig_bundle_to_basic.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/av_reconfig_bundle_to_xcvr.sv
vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_8g_pcs_aggregate_rbc.sv
2. Comment out the following lines, shown in their commented form:
#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/sv_xcvr_avmm_dcd.sv �
#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_8g_pcs_aggregate_rbc.sv�
#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_aux_rbc.sv�
#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_rx_buf_rbc.sv�
#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_rx_deser_rbc.sv�
#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_tx_buf_rbc.sv�
#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_tx_cgb_rbc.sv�
#vlog -sv -work work ../../cpri_top_level_sim/altera_xcvr_det_latency/mentor/arriav_hssi_pma_tx_ser_rbc.sv�
This issue is fixed in version 12.0 of the CPRI MegaCore function.