How do I initialize my Intel® Stratix® 10 and Intel Agilex® 7 FPGA device E-Tile transceiver channels in the Intel® Quartus® Prime Software Transceiver Toolkit?

The Intel® Stratix® 10 and Intel Agilex® 7 FPGA device E-Tile receiver requires incoming data for the RX Adaption algorithm to work. You cannot run the PRBS verifier simultaneously as the RX Adaption algorithm in the Transceiver Toolkit.

To initialize your Intel® Stratix® 10 and Intel Agilex® 7 FPGA device E-Tile transceiver channels in the Intel® Quartus® Prime Pro Edition Software Transceiver Toolkit, you should use the following sequence.

1. Select the TX and RX PHY and switch on the internal serial loopback
2. Select the TX and RX PHY and set the PRBS pattern to PRBS31
3. Select the TX PHY only and start the Hard PRBS Generator
4. Select the RX PHY only and run Initial Adaption and wait for it to finish
5. Select the RX PHY only and start the Hard PRBS Verifier. You should have error-free internal serial loopback data. You can reset the PRBS Verifier if necessary.
6. Select the RX PHY only and stop the Hard PRBS Verifier.
7. Select the TX and RX PHY and switch OFF the internal serial loopback. This assumes that you have external loopback or incoming traffic.
8. Select the RX PHY only and run Initial Adaption and wait for it to finish
9. Select the RX PHY only and start the Hard PRBS Verifier. You should have error-free external serial loopback data or traffic. You can reset the PRBS Verifier if necessary.