Why does the Intel® Quartus® Prime Pro edition software fail to perform Simplex User Avalon Memory-Mapped Interface merging while using F-Tile IPs ?

Due to a problem in the Intel® Quartus® Prime Pro edition software version 21.2, Simplex Avalon Memory-Mapped Interface merging of Local User Avalon Memory-Mapped Interface does not work in F-Tile IPs.

This does affect the F-Tile PMA/FEC Direct PHY Intel FPGA IP and should also affect any other F-Tile IPs supporting simplex mode.

Users who are trying to use two simplex IPs in the same hardware location should only enable Avalon Memory-Mapped Interface on one side, not the other. They can use that single enabled port to control Avalon Memory-Mapped Interface for both TX and RX.