Critical Issue
Description
Serial loopback designs that target Cyclone IV GX devices using the VHDL functional simulation model fail to simulate.
This issue only affects designs that target Cyclone IV GX devices using the VHDL functional simulation model. The design fails to simulate using the VHDL functional simulation model.
Resolution
Use the Verilog HDL functional simulation model instead.
This issue will be fixed in a future version of the ASI MegaCore function.